You may have noticed we’ve been quiet recently. That’s because we’ve been busy reinventing ourselves.

The next evolution of Binius, optimized for simplicity and CPU performance.

Announcing our Series A to Build the Verifiable Internet

Announcing partnership to integrate Binius into RISC Zero zkVM

We’re excited to announce our Binius library's alpha release and first application, an Ethereum state proving service

We demonstrate high-throughput binary tower sumcheck on GPUs using bit-slicing, achieving a 4x speedup over CPU baseline

CPU proof generation bottlenecks are typically tackled by GPU- and FPGA-based hardware acceleration.

32-bit Binary Towers are 5x more hardware efficient than Mersenne31 multipliers

We discuss a GKR-based approach

Announcing collaboration with Polygon Labs on Binius-based zkVM

A major update to FRI-Binius yields better batching, faster recursion, and smaller proofs

ZKP requires high-performance compute to bring cost-effective, real-time transaction validation to web3.

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Ulvetanna is rebranding to Irreducible

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Jim Posen and Radi Cojbasic from Irreducible on the Zero Knowledge podcast.

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

New work on lookup arguments with reduced complexity

You may have noticed we’ve been quiet recently. That’s because we’ve been busy reinventing ourselves.

The next evolution of Binius, optimized for simplicity and CPU performance.

Announcing our Series A to Build the Verifiable Internet

Announcing partnership to integrate Binius into RISC Zero zkVM

We’re excited to announce our Binius library's alpha release and first application, an Ethereum state proving service

We demonstrate high-throughput binary tower sumcheck on GPUs using bit-slicing, achieving a 4x speedup over CPU baseline

CPU proof generation bottlenecks are typically tackled by GPU- and FPGA-based hardware acceleration.

32-bit Binary Towers are 5x more hardware efficient than Mersenne31 multipliers

We discuss a GKR-based approach

Announcing collaboration with Polygon Labs on Binius-based zkVM

A major update to FRI-Binius yields better batching, faster recursion, and smaller proofs

ZKP requires high-performance compute to bring cost-effective, real-time transaction validation to web3.

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Ulvetanna is rebranding to Irreducible

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Jim Posen and Radi Cojbasic from Irreducible on the Zero Knowledge podcast.

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

New work on lookup arguments with reduced complexity

You may have noticed we’ve been quiet recently. That’s because we’ve been busy reinventing ourselves.

The next evolution of Binius, optimized for simplicity and CPU performance.

Announcing our Series A to Build the Verifiable Internet

Announcing partnership to integrate Binius into RISC Zero zkVM

We’re excited to announce our Binius library's alpha release and first application, an Ethereum state proving service

We demonstrate high-throughput binary tower sumcheck on GPUs using bit-slicing, achieving a 4x speedup over CPU baseline

CPU proof generation bottlenecks are typically tackled by GPU- and FPGA-based hardware acceleration.

32-bit Binary Towers are 5x more hardware efficient than Mersenne31 multipliers

We discuss a GKR-based approach

Announcing collaboration with Polygon Labs on Binius-based zkVM

A major update to FRI-Binius yields better batching, faster recursion, and smaller proofs

ZKP requires high-performance compute to bring cost-effective, real-time transaction validation to web3.

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Ulvetanna is rebranding to Irreducible

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Jim Posen and Radi Cojbasic from Irreducible on the Zero Knowledge podcast.

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

New work on lookup arguments with reduced complexity

You may have noticed we’ve been quiet recently. That’s because we’ve been busy reinventing ourselves.

The next evolution of Binius, optimized for simplicity and CPU performance.

Announcing our Series A to Build the Verifiable Internet

Announcing partnership to integrate Binius into RISC Zero zkVM

We’re excited to announce our Binius library's alpha release and first application, an Ethereum state proving service

We demonstrate high-throughput binary tower sumcheck on GPUs using bit-slicing, achieving a 4x speedup over CPU baseline

CPU proof generation bottlenecks are typically tackled by GPU- and FPGA-based hardware acceleration.

32-bit Binary Towers are 5x more hardware efficient than Mersenne31 multipliers

We discuss a GKR-based approach

Announcing collaboration with Polygon Labs on Binius-based zkVM

A major update to FRI-Binius yields better batching, faster recursion, and smaller proofs

ZKP requires high-performance compute to bring cost-effective, real-time transaction validation to web3.

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Ulvetanna is rebranding to Irreducible

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Jim Posen and Radi Cojbasic from Irreducible on the Zero Knowledge podcast.

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

New work on lookup arguments with reduced complexity